1. Technical Field of the Invention
This invention relates generally to wireless communication systems and more particularly to decoding data within such wireless communication systems.
2. Description of Related Art
Wireless communication systems are known to include a plurality of wireless communication devices that communicate over wireless communication channels, which are supported by wireless communication infrastructure equipment (e.g., base stations, access points, system controllers, wide area network interfaces, local area network interfaces, et cetera). Each wireless communication device, which may be a radio, cellular telephone, station coupled to a personal digital assistant, personal computer, laptop, et cetera, includes a radio transmitter and a radio receiver. The radio transmitter includes a baseband processor, one or more intermediate frequency stages, filters, and a power amplifier coupled to an antenna. The baseband processor encodes and/or modulates, in accordance with a wireless communication standard such as IEEE 802.11a, IEEE802.1b, Bluetooth, Global System for Mobile communications (GSM), Advanced Mobile Phone Service (AMPS), et cetera, to produce baseband signals. The one or more intermediate frequency stages mix the baseband signals with one or more local oscillations to produce a radio frequency signal. The filter filters the radio frequency signal to remove unwanted frequency components and the power amplifier amplifies the filtered radio frequency signal prior to transmission via the antenna.
A radio receiver is known to include a low noise amplifier, one or more intermediate frequency stages, filters and a receiver baseband processor. The low noise amplifier amplifies radio frequency (RF) signals received via an antenna and provides the amplified RF signals to the one or more intermediate frequency stages. The one or more intermediate frequency stages mixes the amplified RF signal with one or more local oscillations to produce a receive baseband signal. The receiver baseband processor, in accordance with a particular wireless communication standard, decodes and/or demodulates the baseband signals to recapture data therefrom.
An IEEE 802.11a compliant receiver baseband processor includes analog to digital converters (ADC), fast-fourier-transform module (FFT), frequency equalization module (FEQ), a slicing module, a de-interleaving module and a decoder. The analog to digital converters receive an analog representation of the baseband signal, which for an IEEE 802.11a compliant system includes 64 sub-carriers each of which is an individual sinusoid having a unique amplitude and phase offset to represent encoded data, and converts the analog baseband signals into digital baseband signals. The resulting digital baseband signals include 64 time domain digital signals, each of which is a digital signal representing a particular amplitude and a particular phase of the corresponding analog sub-carriers. The FFT module converts the time domain digital baseband signals into frequency domain baseband signals. For an IEEE802.11a compliant system, the fast-fourier-transform module converts each of the 64 time domain sinusoidal waveforms into 64 bins of I and Q components. The frequency equalization module is programmed to filter the noise injected by the radio frequency channel into the received RF signal.
The slicing module, which may be a soft slicing module or a hard slicing module, generates symbol estimation information for each bin of I and Q components. The de-interleaving module de-interleaves the symbol estimation information, which is subsequently routed to the decoder. The decoder converts the de-interleaved symbol estimation information into branch metrics and recaptures the encoded data from the branch metrics.
In such a receiver baseband processor, the slicing module is a critical component not only from an accuracy standpoint (e.g., errors in the estimation information produces errors in the resulting data), but also from an efficiency standpoint. As is known, a hard slicing module generates error values based on Hamming distance, which indicates the number of bits that are different between the estimated symbol (i.e., the received I and Q values) and the ideal symbols (i.e., the I and Q values for each constellation point of a binary phase shift keying (BPSK) system, quadrature phase shift keying (QPSK) system, 16 QAM (quadrature amplitude modulation) system, or a 64 QAM system). Accordingly, the hard slicing module generates 4 error values for QPSK, 16 error values for 16 QAM, and 64 error values for 64 QAM modulation schemes. The decoder produces the branch metrics from the error terms using an exclusive OR function that is an increasingly iterative process as the number of error values increase.
A soft slicing module generates error terms based on a Euclidean distance, which is a physical measure of the error between the actual symbol value and each ideal symbol value. Like the hard slicing module, the soft slicing module generates 4 error terms for QPSK, 16 error terms for 16 QAM and 64 error terms for 64 QAM. As such, even though a soft slicing module generally provides a 3 dB signal-to-noise ratio improvement over a hard slicing module, it requires a significant amount of processing resources to produce the error values.
Therefore, a need exists for a method and apparatus that provides accurate and efficient baseband processing, especially slicing, within a radio receiver.